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Hi {{their name}}, I'm I. I just applied for the ASIC Engineering Technical Lead :: DFT/MBIST/ATPG/Scan Insertion :: Exp 12+ Years role at Cisco India and your profile stood out — would love a quick referral or even just a chat about the team. Happy to share my resume. Thanks!
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Company
Cisco India
Location
Bangalore, India
Type
Full Time
Experience
10+ years
Posted
19 Dec 2025
Get a referral at Cisco India
Referrals beat cold applications ~5x — opens LinkedIn search.
Highest reply rate — they're paid to source
Engineers on the team can refer you internally
People who posted "we're hiring" recently
Hi {{their name}}, I'm I. I just applied for the ASIC Engineering Technical Lead :: DFT/MBIST/ATPG/Scan Insertion :: Exp 12+ Years role at Cisco India and your profile stood out — would love a quick referral or even just a chat about the team. Happy to share my resume. Thanks!
Company
Cisco India
Location
Bangalore, India
Type
Full Time
Experience
10+ years
Posted
19 Dec 2025
Req ID
1426739
* Bachelor's or a Master’s Degree in Electrical or Computer Engineering required with at least 10 years of experience. * Knowledge of the latest innovative trends in DFT, test and silicon engineering. * Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan. * Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime * Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design * Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan. * Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime * Experience working with Gate level simulation, debugging with VCS and other simulators. * Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687 * Strong verbal skills and ability to thrive in a multifaceted environment * Scripting skills: Tcl, Python/Perl. Preferred
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