SOC verification Manager/Lead at AMD India

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. SOC verification Manager/Lead Job Summary We are seeking an experienced and highly motivated Verification experts to lead verification activities for complex SoC designs. The ideal candidate will have deep expertise in SoC-level verification, power management verification, low-power verification methodologies, and SoC verification architecture development. This role involves defining verification strategies, architecting scalable verification environments, driving functional and power-aware verification closure, and mentoring verification teams across multiple projects. Key Responsibilities Define and drive the overall SoC verification strategy for complex multi-billion transistor SoCs. Architect and develop scalable, reusable, and robust SoC verification environments using industry-standard methodologies. Lead end-to-end verification planning, execution, coverage closure, and sign-off activities. Drive power management verification, including validation of power state transitions, power controllers, reset sequencing, clock management, and power domain interactions. Lead low-power verification using UPF/CPF methodologies and ensure compliance with low-power design intent. Develop and review verification architectures, test plans, assertions, checkers, scoreboards, and coverage models. Collaborate closely with architecture, RTL design, firmware, emulation, validation, and physical design teams. Drive debug and root-cause analysis of complex SoC-level issues. Establish verification best practices, automation frameworks, and verification metrics. Support verification across simulation, emulation, FPGA prototyping, and post-silicon validation environments. Mentor and technically lead a team of verification engineers. Participate in design reviews and contribute to architecture discussions from a verification perspective. Required Skills & Qualifications Technical Expertise 12–20 years of experience in VLSI Design Verification with a strong focus on SoC verification. Proven experience in: SoC-Level Verification SoC Verification Architecture Power Management Verification Low-Power Verification Functional Verification and Coverage Closure Strong understanding of SoC architectures involving CPUs, interconnects, memory subsystems, peripherals, and accelerators. Expertise in SystemVerilog and UVM-based verification methodologies. Hands-on experience with assertion-based verification (SVA). Strong experience with UPF/CPF and power-aware simulation flows. Deep understanding of: Power domains Retention strategies Isolation techniques Level shifters Dynamic voltage and frequency scaling (DVFS) Power state management Experience with verification planning, coverage analysis, and regression management. Strong debugging skills in complex SoC environments. Preferred Skills Experience with emulation and FPGA prototyping platforms. Exposure to firmware-assisted verification and hardware/software co-verification. Experience in AI/ML, networking, automotive, mobile, data center, or high-performance computing SoCs. Knowledge of formal verification techniques. Scripting proficiency in Python, Perl, or Shell. Leadership Expectations Provide technical leadership for large verification programs. Drive verification methodology improvements and standardization. Mentor and develop junior and senior verification engineers. Influence architecture and design decisions through verification insights. Collaborate with global cross-functional teams to ensure successful project execution. Education Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related field. #L1-RG2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. SOC verification Manager/Lead Job Summary We are seeking an experienced and highly motivated Verification experts to lead verification activities for complex SoC designs. The ideal candidate will have deep expertise in SoC-level verification, power management verification, low-power verification methodologies, and SoC verification architecture development. This role involves defining verification strategies, architecting scalable verification environments, driving functional and power-aware verification closure, and mentoring verification teams across multiple projects. Key Responsibilities Define and drive the overall SoC verification strategy for complex multi-billion transistor SoCs. Architect and develop scalable, reusable, and robust SoC verification environments using industry-standard methodologies. Lead end-to-end verification planning, execution, coverage closure, and sign-off activities. Drive power management verification, including validation of power state transitions, power controllers, reset sequencing, clock management, and power domain interactions. Lead low-power verification using UPF/CPF methodologies and ensure compliance with low-power design intent. Develop and review verification architectures, test plans, assertions, checkers, scoreboards, and coverage models. Collaborate closely with architecture, RTL design, firmware, emulation, validation, and physical design teams. Drive debug and root-cause analysis of complex SoC-level issues. Establish verification best practices, automation frameworks, and verification metrics. Support verification across simulation, emulation, FPGA prototyping, and post-silicon validation environments. Mentor and technically lead a team of verification engineers. Participate in design reviews and contribute to architecture discussions from a verification perspective. Required Skills & Qualifications Technical Expertise 12–20 years of experience in VLSI Design Verification with a strong focus on SoC verification. Proven experience in: SoC-Level Verification SoC Verification Architecture Power Management Verification Low-Power Verification Functional Verification and Coverage Closure Strong understanding of SoC architectures involving CPUs, interconnects, memory subsystems, peripherals, and accelerators. Expertise in SystemVerilog and UVM-based verification methodologies. Hands-on experience with assertion-based verification (SVA). Strong experience with UPF/CPF and power-aware simulation flows. Deep understanding of: Power domains Retention strategies Isolation techniques Level shifters Dynamic voltage and frequency scaling (DVFS) Power state management Experience with verification planning, coverage analysis, and regression management. Strong debugging skills in complex SoC environments. Preferred Skills Experience with emulation and FPGA prototyping platforms. Exposure to firmware-assisted verification and hardware/software co-verification. Experience in AI/ML, networking, automotive, mobile, data center, or high-performance computing SoCs. Knowledge of formal verification techniques. Scripting proficiency in Python, Perl, or Shell. Leadership Expectations Provide technical leadership for large verification programs. Drive verification methodology improvements and standardization. Mentor and develop junior and senior verification engineers. Influence architecture and design decisions through verification insights. Collaborate with global cross-functional teams to ensure successful project execution. Education Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related field. #L1-RG2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

SOC verification Manager/Lead

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